<< Click to Display Table of Contents > 

FAQ > Troubleshooting > Opto I/O > Decrease Signal Rise Time

Decrease Signal Rise Time
Previous pageReturn to chapter overviewNext page

The signal rise time can be decreased by applying a resistor between every single OptoOut and OptoV+. The figure below shows one OptoOut of the USC-1 without and with a 470R pull-up resistor with OptoV+ = 5 V.

USC1_OptoOut

Figure 35: Opto_Out USC-1 with and without 470R pull-up

The figure below shows how to connect USC with power supply and pull-up resistor to an external logic.

USC_OPTO_O_PULLUP

Figure 36: Opto_Out USC with pull-up